MAV'RIC: /home/travis/build/lis-epfl/MAVRIC_Library/boards/megafly_rev4/conf

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00001 
00040 #ifndef CONF_CLOCK_H_INCLUDED
00041 #define CONF_CLOCK_H_INCLUDED
00042 
00043 
00044 #ifdef __cplusplus
00045 extern "C"
00046 {
00047 #endif
00048 
00049 
00050 //#define CONFIG_SYSCLK_INIT_CPUMASK  (1 << SYSCLK_SYSTIMER)
00051 //#define CONFIG_SYSCLK_INIT_PBAMASK  (1 << SYSCLK_USART0)
00052 //#define CONFIG_SYSCLK_INIT_PBBMASK  (1 << SYSCLK_HMATRIX)
00053 //#define CONFIG_SYSCLK_INIT_HSBMASK  (1 << SYSCLK_MDMA_HSB)
00054 
00055 //#define CONFIG_SYSCLK_SOURCE          SYSCLK_SRC_RCSYS
00056 //#define CONFIG_SYSCLK_SOURCE        SYSCLK_SRC_OSC0
00057 //#define CONFIG_SYSCLK_SOURCE        SYSCLK_SRC_OSC1
00058 #define CONFIG_SYSCLK_SOURCE          SYSCLK_SRC_PLL0
00059 //#define CONFIG_SYSCLK_SOURCE        SYSCLK_SRC_PLL1
00060 //#define CONFIG_SYSCLK_SOURCE        SYSCLK_SRC_RC8M
00061 
00062 /* Fbus = Fsys / (2 ^ BUS_div) */
00063 #define CONFIG_SYSCLK_CPU_DIV         0
00064 #define CONFIG_SYSCLK_PBA_DIV         0
00065 #define CONFIG_SYSCLK_PBB_DIV         0
00066 #define CONFIG_SYSCLK_PBC_DIV         0
00067 
00068 //#define CONFIG_USBCLK_SOURCE        USBCLK_SRC_OSC0
00069 //#define CONFIG_USBCLK_SOURCE        USBCLK_SRC_OSC1
00070 //#define   CONFIG_USBCLK_SOURCE        USBCLK_SRC_PLL0
00071 #define CONFIG_USBCLK_SOURCE        USBCLK_SRC_PLL1
00072 
00073 /* Fusb = Fsys / USB_div */
00074 #define CONFIG_USBCLK_DIV             1
00075 
00076 #define CONFIG_PLL0_SOURCE            PLL_SRC_OSC0
00077 //#define CONFIG_PLL0_SOURCE          PLL_SRC_OSC1
00078 //#define CONFIG_PLL0_SOURCE          PLL_SRC_RC8M
00079 
00080 /* Fpll0 = (Fclk * PLL_mul) / PLL_div */
00081 #define CONFIG_PLL0_MUL               (64000000UL / BOARD_OSC0_HZ)
00082 #define CONFIG_PLL0_DIV               1
00083 
00084 #define CONFIG_PLL1_SOURCE            PLL_SRC_OSC0
00085 //#define CONFIG_PLL1_SOURCE          PLL_SRC_OSC1
00086 //#define CONFIG_PLL1_SOURCE          PLL_SRC_RC8M
00087 
00088 /* Fpll1 = (Fclk * PLL_mul) / PLL_div */
00089 #define CONFIG_PLL1_MUL               (48000000UL / BOARD_OSC0_HZ)
00090 #define CONFIG_PLL1_DIV               1
00091 
00092 #ifdef __cplusplus
00093 }
00094 #endif
00095 
00096 #endif /* CONF_CLOCK_H_INCLUDED */